2460 lines
101 KiB
C++
2460 lines
101 KiB
C++
/*
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* FPGA Interface C API 15.0 header file.
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*
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* Copyright (c) 2015,
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* National Instruments Corporation.
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* All rights reserved.
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*/
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#ifndef __NiFpga_h__
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#define __NiFpga_h__
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/*
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* Determine platform details.
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*/
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#if defined(_M_IX86) \
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|| defined(_M_X64) \
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|| defined(_M_AMD64) \
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|| defined(i386) \
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|| defined(__i386) \
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|| defined(__i386__) \
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|| defined(__i486__) \
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|| defined(__i586__) \
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|| defined(__i686__) \
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|| defined(__amd64__) \
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|| defined(__amd64) \
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|| defined(__x86_64__) \
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|| defined(__x86_64) \
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|| defined(__IA32__) \
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|| defined(_X86_) \
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|| defined(__THW_INTEL__) \
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|| defined(__I86__) \
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|| defined(__INTEL__) \
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|| defined(__X86__) \
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|| defined(__386__) \
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|| defined(__I86__) \
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|| defined(M_I386) \
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|| defined(M_I86) \
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|| defined(_M_I386) \
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|| defined(_M_I86)
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#if defined(_WIN32) \
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|| defined(_WIN64) \
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|| defined(__WIN32__) \
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|| defined(__TOS_WIN__) \
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|| defined(__WINDOWS__) \
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|| defined(_WINDOWS) \
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|| defined(__WINDOWS_386__) \
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|| defined(__CYGWIN__)
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/* Either Windows or Phar Lap ETS. */
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#define NiFpga_Windows 1
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#elif defined(__linux__) \
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|| defined(__linux) \
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|| defined(linux) \
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|| defined(__gnu_linux__)
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#define NiFpga_Linux 1
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#elif defined(__APPLE__) && defined(__MACH__)
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#define NiFpga_MacOsX 1
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#else
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#error Unsupported OS.
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#endif
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#elif defined(__powerpc) \
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|| defined(__powerpc__) \
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|| defined(__POWERPC__) \
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|| defined(__ppc__) \
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|| defined(__PPC) \
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|| defined(_M_PPC) \
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|| defined(_ARCH_PPC) \
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|| defined(__PPC__) \
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|| defined(__ppc)
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#if defined(__vxworks)
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#define NiFpga_VxWorks 1
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#else
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#error Unsupported OS.
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#endif
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#elif defined(__arm__) \
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|| defined(__thumb__) \
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|| defined(__TARGET_ARCH_ARM) \
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|| defined(__TARGET_ARCH_THUMB) \
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|| defined(_ARM) \
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|| defined(_M_ARM) \
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|| defined(_M_ARMT)
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#if defined(__linux__) \
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|| defined(__linux) \
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|| defined(linux) \
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|| defined(__gnu_linux__)
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#define NiFpga_Linux 1
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#else
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#error Unsupported OS.
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#endif
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#else
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#error Unsupported architecture.
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#endif
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/*
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* Determine compiler.
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*/
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#if defined(_MSC_VER)
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#define NiFpga_Msvc 1
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#elif defined(__GNUC__)
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#define NiFpga_Gcc 1
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#elif defined(_CVI_) && !defined(_TPC_)
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#define NiFpga_Cvi 1
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/* Enables CVI Library Protection Errors. */
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#pragma EnableLibraryRuntimeChecking
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#else
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/* Unknown compiler. */
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#endif
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/*
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* Determine compliance with different C/C++ language standards.
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*/
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#if defined(__cplusplus)
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#define NiFpga_Cpp 1
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#if __cplusplus >= 199707L
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#define NiFpga_Cpp98 1
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#if __cplusplus >= 201103L
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#define NiFpga_Cpp11 1
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#endif
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#endif
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#endif
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#if defined(__STDC__)
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#define NiFpga_C89 1
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#if defined(__STDC_VERSION__)
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#define NiFpga_C90 1
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#if __STDC_VERSION__ >= 199409L
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#define NiFpga_C94 1
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#if __STDC_VERSION__ >= 199901L
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#define NiFpga_C99 1
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#if __STDC_VERSION__ >= 201112L
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#define NiFpga_C11 1
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#endif
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#endif
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#endif
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#endif
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#endif
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/*
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* Determine ability to inline functions.
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*/
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#if NiFpga_Cpp || NiFpga_C99
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/* The inline keyword exists in C++ and C99. */
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#define NiFpga_Inline inline
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#elif NiFpga_Msvc
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/* Visual C++ (at least since 6.0) also supports an alternate keyword. */
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#define NiFpga_Inline __inline
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#elif NiFpga_Gcc
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/* GCC (at least since 2.95.2) also supports an alternate keyword. */
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#define NiFpga_Inline __inline__
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#elif !defined(NiFpga_Inline)
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/*
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* Disable inlining if inline support is unknown. To manually enable
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* inlining, #define the following macro before #including NiFpga.h:
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*
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* #define NiFpga_Inline inline
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*/
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#define NiFpga_Inline
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#endif
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/*
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* Define exact-width integer types, if they have not already been defined.
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*/
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#if NiFpga_ExactWidthIntegerTypesDefined \
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|| defined(_STDINT) \
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|| defined(_STDINT_H) \
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|| defined(_STDINT_H_) \
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|| defined(_INTTYPES_H) \
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|| defined(_INTTYPES_H_) \
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|| defined(_SYS_STDINT_H) \
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|| defined(_SYS_STDINT_H_) \
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|| defined(_SYS_INTTYPES_H) \
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|| defined(_SYS_INTTYPES_H_) \
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|| defined(_STDINT_H_INCLUDED) \
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|| defined(_MSC_STDINT_H_) \
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|| defined(_PSTDINT_H_INCLUDED)
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/* Assume that exact-width integer types have already been defined. */
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#elif NiFpga_VxWorks
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/* VxWorks (at least 6.3 and earlier) did not have stdint.h. */
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#include <types/vxTypes.h>
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#elif NiFpga_C99 \
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|| NiFpga_Gcc /* GCC (at least since 3.0) has a stdint.h. */ \
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|| defined(HAVE_STDINT_H)
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/* Assume that stdint.h can be included. */
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#include <stdint.h>
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#elif NiFpga_Msvc \
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|| NiFpga_Cvi
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/* Manually define exact-width integer types. */
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typedef signed char int8_t;
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typedef unsigned char uint8_t;
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typedef short int16_t;
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typedef unsigned short uint16_t;
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typedef int int32_t;
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typedef unsigned int uint32_t;
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typedef __int64 int64_t;
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typedef unsigned __int64 uint64_t;
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#else
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/*
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* Exact-width integer types must be defined by the user, and the following
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* macro must be #defined, before #including NiFpga.h:
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*
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* #define NiFpga_ExactWidthIntegerTypesDefined 1
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*/
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#error Exact-width integer types must be defined by the user. See comment.
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#endif
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/* Included for definition of size_t. */
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#include <stddef.h>
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#if NiFpga_Cpp
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extern "C"
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{
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#endif
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/**
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* A boolean value; either NiFpga_False or NiFpga_True.
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*/
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typedef uint8_t NiFpga_Bool;
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/**
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* Represents a false condition.
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*/
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static const NiFpga_Bool NiFpga_False = 0;
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/**
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* Represents a true condition.
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*/
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static const NiFpga_Bool NiFpga_True = 1;
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/**
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* Represents the resulting status of a function call through its return value.
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* 0 is success, negative values are errors, and positive values are warnings.
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*/
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typedef int32_t NiFpga_Status;
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/**
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* No errors or warnings.
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*/
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static const NiFpga_Status NiFpga_Status_Success = 0;
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/**
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* The timeout expired before the FIFO operation could complete.
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*/
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static const NiFpga_Status NiFpga_Status_FifoTimeout = -50400;
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/**
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* No transfer is in progress because the transfer was aborted by the client.
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* The operation could not be completed as specified.
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*/
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static const NiFpga_Status NiFpga_Status_TransferAborted = -50405;
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/**
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* A memory allocation failed. Try again after rebooting.
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*/
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static const NiFpga_Status NiFpga_Status_MemoryFull = -52000;
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/**
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* An unexpected software error occurred.
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*/
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static const NiFpga_Status NiFpga_Status_SoftwareFault = -52003;
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/**
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* A parameter to a function was not valid. This could be a NULL pointer, a bad
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* value, etc.
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*/
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static const NiFpga_Status NiFpga_Status_InvalidParameter = -52005;
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/**
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* A required resource was not found. The NiFpga.* library, the RIO resource, or
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* some other resource may be missing.
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*/
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static const NiFpga_Status NiFpga_Status_ResourceNotFound = -52006;
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/**
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* A required resource was not properly initialized. This could occur if
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* NiFpga_Initialize was not called or a required NiFpga_IrqContext was not
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* reserved.
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*/
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static const NiFpga_Status NiFpga_Status_ResourceNotInitialized = -52010;
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/**
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* A hardware failure has occurred. The operation could not be completed as
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* specified.
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*/
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static const NiFpga_Status NiFpga_Status_HardwareFault = -52018;
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/**
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* The FPGA is already running.
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*/
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static const NiFpga_Status NiFpga_Status_FpgaAlreadyRunning = -61003;
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/**
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* An error occurred downloading the VI to the FPGA device. Verify that
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* the target is connected and powered and that the resource of the target
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* is properly configured.
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*/
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static const NiFpga_Status NiFpga_Status_DownloadError = -61018;
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/**
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* The bitfile was not compiled for the specified resource's device type.
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*/
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static const NiFpga_Status NiFpga_Status_DeviceTypeMismatch = -61024;
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/**
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* An error was detected in the communication between the host computer and the
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* FPGA target.
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*/
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static const NiFpga_Status NiFpga_Status_CommunicationTimeout = -61046;
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/**
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* The timeout expired before any of the IRQs were asserted.
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*/
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static const NiFpga_Status NiFpga_Status_IrqTimeout = -61060;
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/**
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* The specified bitfile is invalid or corrupt.
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*/
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static const NiFpga_Status NiFpga_Status_CorruptBitfile = -61070;
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/**
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* The requested FIFO depth is invalid. It is either 0 or an amount not
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* supported by the hardware.
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*/
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static const NiFpga_Status NiFpga_Status_BadDepth = -61072;
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/**
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* The number of FIFO elements is invalid. Either the number is greater than the
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* depth of the host memory DMA FIFO, or more elements were requested for
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* release than had been acquired.
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*/
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static const NiFpga_Status NiFpga_Status_BadReadWriteCount = -61073;
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/**
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* A hardware clocking error occurred. A derived clock lost lock with its base
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* clock during the execution of the LabVIEW FPGA VI. If any base clocks with
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* derived clocks are referencing an external source, make sure that the
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* external source is connected and within the supported frequency, jitter,
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* accuracy, duty cycle, and voltage specifications. Also verify that the
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* characteristics of the base clock match the configuration specified in the
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* FPGA Base Clock Properties. If all base clocks with derived clocks are
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* generated from free-running, on-board sources, please contact National
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* Instruments technical support at ni.com/support.
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*/
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static const NiFpga_Status NiFpga_Status_ClockLostLock = -61083;
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/**
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* The operation could not be performed because the FPGA is busy. Stop all
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* activities on the FPGA before requesting this operation. If the target is in
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* Scan Interface programming mode, put it in FPGA Interface programming mode.
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*/
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static const NiFpga_Status NiFpga_Status_FpgaBusy = -61141;
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/**
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* The operation could not be performed because the FPGA is busy operating in
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* FPGA Interface C API mode. Stop all activities on the FPGA before requesting
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* this operation.
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*/
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static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterfaceCApi = -61200;
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/**
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* The chassis is in Scan Interface programming mode. In order to run FPGA VIs,
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* you must go to the chassis properties page, select FPGA programming mode, and
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* deploy settings.
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*/
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static const NiFpga_Status NiFpga_Status_FpgaBusyScanInterface = -61201;
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/**
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* The operation could not be performed because the FPGA is busy operating in
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* FPGA Interface mode. Stop all activities on the FPGA before requesting this
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* operation.
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*/
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static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterface = -61202;
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/**
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* The operation could not be performed because the FPGA is busy operating in
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* Interactive mode. Stop all activities on the FPGA before requesting this
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* operation.
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*/
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static const NiFpga_Status NiFpga_Status_FpgaBusyInteractive = -61203;
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/**
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* The operation could not be performed because the FPGA is busy operating in
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* Emulation mode. Stop all activities on the FPGA before requesting this
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* operation.
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*/
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static const NiFpga_Status NiFpga_Status_FpgaBusyEmulation = -61204;
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/**
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* LabVIEW FPGA does not support the Reset method for bitfiles that allow
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* removal of implicit enable signals in single-cycle Timed Loops.
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*/
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static const NiFpga_Status NiFpga_Status_ResetCalledWithImplicitEnableRemoval = -61211;
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/**
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* LabVIEW FPGA does not support the Abort method for bitfiles that allow
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* removal of implicit enable signals in single-cycle Timed Loops.
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*/
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static const NiFpga_Status NiFpga_Status_AbortCalledWithImplicitEnableRemoval = -61212;
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/**
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* LabVIEW FPGA does not support Close and Reset if Last Reference for bitfiles
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* that allow removal of implicit enable signals in single-cycle Timed Loops.
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* Pass the NiFpga_CloseAttribute_NoResetIfLastSession attribute to NiFpga_Close
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* instead of 0.
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*/
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static const NiFpga_Status NiFpga_Status_CloseAndResetCalledWithImplicitEnableRemoval = -61213;
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/**
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* For bitfiles that allow removal of implicit enable signals in single-cycle
|
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* Timed Loops, LabVIEW FPGA does not support this method prior to running the
|
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* bitfile.
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*/
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static const NiFpga_Status NiFpga_Status_ImplicitEnableRemovalButNotYetRun = -61214;
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/**
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* Bitfiles that allow removal of implicit enable signals in single-cycle Timed
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* Loops can run only once. Download the bitfile again before re-running the VI.
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*/
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static const NiFpga_Status NiFpga_Status_RunAfterStoppedCalledWithImplicitEnableRemoval = -61215;
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/**
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* A gated clock has violated the handshaking protocol. If you are using
|
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* external gated clocks, ensure that they follow the required clock gating
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* protocol. If you are generating your clocks internally, please contact
|
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* National Instruments Technical Support.
|
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*/
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static const NiFpga_Status NiFpga_Status_GatedClockHandshakingViolation = -61216;
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/**
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* The number of elements requested must be less than or equal to the number of
|
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* unacquired elements left in the host memory DMA FIFO. There are currently
|
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* fewer unacquired elements left in the FIFO than are being requested. Release
|
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* some acquired elements before acquiring more elements.
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*/
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static const NiFpga_Status NiFpga_Status_ElementsNotPermissibleToBeAcquired = -61219;
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|
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/**
|
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* The operation could not be performed because the FPGA is in configuration or
|
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* discovery mode. Wait for configuration or discovery to complete and retry
|
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* your operation.
|
|
*/
|
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static const NiFpga_Status NiFpga_Status_FpgaBusyConfiguration = -61252;
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|
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/**
|
|
* An unexpected internal error occurred.
|
|
*/
|
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static const NiFpga_Status NiFpga_Status_InternalError = -61499;
|
|
|
|
/**
|
|
* The NI-RIO driver was unable to allocate memory for a FIFO. This can happen
|
|
* when the combined depth of all DMA FIFOs exceeds the maximum depth for the
|
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* controller, or when the controller runs out of system memory. You may be able
|
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* to reconfigure the controller with a greater maximum FIFO depth. For more
|
|
* information, refer to the NI KnowledgeBase article 65OF2ERQ.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_TotalDmaFifoDepthExceeded = -63003;
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|
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/**
|
|
* Access to the remote system was denied. Use MAX to check the Remote Device
|
|
* Access settings under Software>>NI-RIO>>NI-RIO Settings on the remote system.
|
|
*/
|
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static const NiFpga_Status NiFpga_Status_AccessDenied = -63033;
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|
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/**
|
|
* The NI-RIO software on the host is not compatible with the software on the
|
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* target. Upgrade the NI-RIO software on the host in order to connect to this
|
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* target.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_HostVersionMismatch = -63038;
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|
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/**
|
|
* A connection could not be established to the specified remote device. Ensure
|
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* that the device is on and accessible over the network, that NI-RIO software
|
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* is installed, and that the RIO server is running and properly configured.
|
|
*/
|
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static const NiFpga_Status NiFpga_Status_RpcConnectionError = -63040;
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|
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/**
|
|
* The RPC session is invalid. The target may have reset or been rebooted. Check
|
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* the network connection and retry the operation.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_RpcSessionError = -63043;
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|
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/**
|
|
* The operation could not complete because another session is accessing the
|
|
* FIFO. Close the other session and retry.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_FifoReserved = -63082;
|
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|
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/**
|
|
* A Configure FIFO, Stop FIFO, Read FIFO, or Write FIFO function was called
|
|
* while the host had acquired elements of the FIFO. Release all acquired
|
|
* elements before configuring, stopping, reading, or writing.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_FifoElementsCurrentlyAcquired = -63083;
|
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|
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/**
|
|
* A function was called using a misaligned address. The address must be a
|
|
* multiple of the size of the datatype.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_MisalignedAccess = -63084;
|
|
|
|
/**
|
|
* The FPGA Read/Write Control Function is accessing a control or indicator
|
|
* with data that exceeds the maximum size supported on the current target.
|
|
* Refer to the hardware documentation for the limitations on data types for
|
|
* this target.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_ControlOrIndicatorTooLarge = -63085;
|
|
|
|
/**
|
|
* A valid .lvbitx bitfile is required. If you are using a valid .lvbitx
|
|
* bitfile, the bitfile may not be compatible with the software you are using.
|
|
* Determine which version of LabVIEW was used to make the bitfile, update your
|
|
* software to that version or later, and try again.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_BitfileReadError = -63101;
|
|
|
|
/**
|
|
* The specified signature does not match the signature of the bitfile. If the
|
|
* bitfile has been recompiled, regenerate the C API and rebuild the
|
|
* application.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_SignatureMismatch = -63106;
|
|
|
|
/**
|
|
* The bitfile you are trying to use is incompatible with the version
|
|
* of NI-RIO installed on the target and/or host. Update the version
|
|
* of NI-RIO on the target and/or host to the same version (or later)
|
|
* used to compile the bitfile. Alternatively, recompile the bitfile
|
|
* with the same version of NI-RIO that is currently installed on the
|
|
* target and/or host.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_IncompatibleBitfile = -63107;
|
|
|
|
/**
|
|
* Either the supplied resource name is invalid as a RIO resource name, or the
|
|
* device was not found. Use MAX to find the proper resource name for the
|
|
* intended device.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_InvalidResourceName = -63192;
|
|
|
|
/**
|
|
* The requested feature is not supported.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_FeatureNotSupported = -63193;
|
|
|
|
/**
|
|
* The NI-RIO software on the target system is not compatible with this
|
|
* software. Upgrade the NI-RIO software on the target system.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_VersionMismatch = -63194;
|
|
|
|
/**
|
|
* The session is invalid or has been closed.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_InvalidSession = -63195;
|
|
|
|
/**
|
|
* The maximum number of open FPGA sessions has been reached. Close some open
|
|
* sessions.
|
|
*/
|
|
static const NiFpga_Status NiFpga_Status_OutOfHandles = -63198;
|
|
|
|
/**
|
|
* Tests whether a status is an error.
|
|
*
|
|
* @param status status to check for an error
|
|
* @return whether the status was an error
|
|
*/
|
|
static NiFpga_Inline NiFpga_Bool NiFpga_IsError(const NiFpga_Status status)
|
|
{
|
|
return status < NiFpga_Status_Success ? NiFpga_True : NiFpga_False;
|
|
}
|
|
|
|
/**
|
|
* Tests whether a status is not an error. Success and warnings are not errors.
|
|
*
|
|
* @param status status to check for an error
|
|
* @return whether the status was a success or warning
|
|
*/
|
|
static NiFpga_Inline NiFpga_Bool NiFpga_IsNotError(const NiFpga_Status status)
|
|
{
|
|
return status >= NiFpga_Status_Success ? NiFpga_True : NiFpga_False;
|
|
}
|
|
|
|
/**
|
|
* Conditionally sets the status to a new value. The previous status is
|
|
* preserved unless the new status is more of an error, which means that
|
|
* warnings and errors overwrite successes, and errors overwrite warnings. New
|
|
* errors do not overwrite older errors, and new warnings do not overwrite
|
|
* older warnings.
|
|
*
|
|
* @param status status to conditionally set
|
|
* @param newStatus new status value that may be set
|
|
* @return the resulting status
|
|
*/
|
|
static NiFpga_Inline NiFpga_Status NiFpga_MergeStatus(
|
|
NiFpga_Status* const status,
|
|
const NiFpga_Status newStatus)
|
|
{
|
|
if (!status)
|
|
return NiFpga_Status_InvalidParameter;
|
|
if (NiFpga_IsNotError(*status)
|
|
&& (*status == NiFpga_Status_Success || NiFpga_IsError(newStatus)))
|
|
*status = newStatus;
|
|
return *status;
|
|
}
|
|
|
|
/**
|
|
* This macro evaluates the expression only if the status is not an error. The
|
|
* expression must evaluate to an NiFpga_Status, such as a call to any NiFpga_*
|
|
* function, because the status will be set to the returned status if the
|
|
* expression is evaluated.
|
|
*
|
|
* You can use this macro to mimic status chaining in LabVIEW, where the status
|
|
* does not have to be explicitly checked after each call. Such code may look
|
|
* like the following example.
|
|
*
|
|
* NiFpga_Status status = NiFpga_Status_Success;
|
|
* NiFpga_IfIsNotError(status, NiFpga_WriteU32(...));
|
|
* NiFpga_IfIsNotError(status, NiFpga_WriteU32(...));
|
|
* NiFpga_IfIsNotError(status, NiFpga_WriteU32(...));
|
|
*
|
|
* @param status status to check for an error
|
|
* @param expression expression to call if the incoming status is not an error
|
|
*/
|
|
#define NiFpga_IfIsNotError(status, expression) \
|
|
if (NiFpga_IsNotError(status)) \
|
|
NiFpga_MergeStatus(&status, (expression)); \
|
|
|
|
/**
|
|
* You must call this function before all other function calls. This function
|
|
* loads the NiFpga library so that all the other functions will work. If this
|
|
* function succeeds, you must call NiFpga_Finalize after all other function
|
|
* calls.
|
|
*
|
|
* @warning This function is not thread safe.
|
|
*
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Initialize(void);
|
|
|
|
/**
|
|
* You must call this function after all other function calls if
|
|
* NiFpga_Initialize succeeds. This function unloads the NiFpga library.
|
|
*
|
|
* @warning This function is not thread safe.
|
|
*
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Finalize(void);
|
|
|
|
/**
|
|
* A handle to an FPGA session.
|
|
*/
|
|
typedef uint32_t NiFpga_Session;
|
|
|
|
/**
|
|
* Attributes that NiFpga_Open accepts.
|
|
*/
|
|
typedef enum
|
|
{
|
|
NiFpga_OpenAttribute_NoRun = 1
|
|
} NiFpga_OpenAttribute;
|
|
|
|
/**
|
|
* Opens a session to the FPGA. This call ensures that the contents of the
|
|
* bitfile are programmed to the FPGA. The FPGA runs unless the
|
|
* NiFpga_OpenAttribute_NoRun attribute is used.
|
|
*
|
|
* Because different operating systems have different default current working
|
|
* directories for applications, you must pass an absolute path for the bitfile
|
|
* parameter. If you pass only the filename instead of an absolute path, the
|
|
* operating system may not be able to locate the bitfile. For example, the
|
|
* default current working directories are C:\ni-rt\system\ for Phar Lap ETS and
|
|
* /c/ for VxWorks. Because the generated *_Bitfile constant is a #define to a
|
|
* string literal, you can use C/C++ string-literal concatenation to form an
|
|
* absolute path. For example, if the bitfile is in the root directory of a
|
|
* Phar Lap ETS system, pass the following for the bitfile parameter.
|
|
*
|
|
* "C:\\" NiFpga_MyApplication_Bitfile
|
|
*
|
|
* @param bitfile path to the bitfile
|
|
* @param signature signature of the bitfile
|
|
* @param resource RIO resource string to open ("RIO0" or "rio://mysystem/RIO")
|
|
* @param attribute bitwise OR of any NiFpga_OpenAttributes, or 0
|
|
* @param session outputs the session handle, which must be closed when no
|
|
* longer needed
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Open(const char* bitfile,
|
|
const char* signature,
|
|
const char* resource,
|
|
uint32_t attribute,
|
|
NiFpga_Session* session);
|
|
|
|
/**
|
|
* Attributes that NiFpga_Close accepts.
|
|
*/
|
|
typedef enum
|
|
{
|
|
NiFpga_CloseAttribute_NoResetIfLastSession = 1
|
|
} NiFpga_CloseAttribute;
|
|
|
|
/**
|
|
* Closes the session to the FPGA. The FPGA resets unless either another session
|
|
* is still open or you use the NiFpga_CloseAttribute_NoResetIfLastSession
|
|
* attribute.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param attribute bitwise OR of any NiFpga_CloseAttributes, or 0
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Close(NiFpga_Session session,
|
|
uint32_t attribute);
|
|
|
|
/**
|
|
* Attributes that NiFpga_Run accepts.
|
|
*/
|
|
typedef enum
|
|
{
|
|
NiFpga_RunAttribute_WaitUntilDone = 1
|
|
} NiFpga_RunAttribute;
|
|
|
|
/**
|
|
* Runs the FPGA VI on the target. If you use NiFpga_RunAttribute_WaitUntilDone,
|
|
* NiFpga_Run blocks the thread until the FPGA finishes running.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param attribute bitwise OR of any NiFpga_RunAttributes, or 0
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Run(NiFpga_Session session,
|
|
uint32_t attribute);
|
|
|
|
/**
|
|
* Aborts the FPGA VI.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Abort(NiFpga_Session session);
|
|
|
|
/**
|
|
* Resets the FPGA VI.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Reset(NiFpga_Session session);
|
|
|
|
/**
|
|
* Re-downloads the FPGA bitstream to the target.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_Download(NiFpga_Session session);
|
|
|
|
/**
|
|
* Reads a boolean value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadBool(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
NiFpga_Bool* value);
|
|
|
|
/**
|
|
* Reads a signed 8-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadI8(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int8_t* value);
|
|
|
|
/**
|
|
* Reads an unsigned 8-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadU8(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint8_t* value);
|
|
|
|
/**
|
|
* Reads a signed 16-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadI16(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int16_t* value);
|
|
|
|
/**
|
|
* Reads an unsigned 16-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadU16(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint16_t* value);
|
|
|
|
/**
|
|
* Reads a signed 32-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadI32(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int32_t* value);
|
|
|
|
/**
|
|
* Reads an unsigned 32-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadU32(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint32_t* value);
|
|
|
|
/**
|
|
* Reads a signed 64-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadI64(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int64_t* value);
|
|
|
|
/**
|
|
* Reads an unsigned 64-bit integer value from a given indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param value outputs the value that was read
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadU64(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint64_t* value);
|
|
|
|
/**
|
|
* Writes a boolean value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteBool(NiFpga_Session session,
|
|
uint32_t control,
|
|
NiFpga_Bool value);
|
|
|
|
/**
|
|
* Writes a signed 8-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteI8(NiFpga_Session session,
|
|
uint32_t control,
|
|
int8_t value);
|
|
|
|
/**
|
|
* Writes an unsigned 8-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteU8(NiFpga_Session session,
|
|
uint32_t control,
|
|
uint8_t value);
|
|
|
|
/**
|
|
* Writes a signed 16-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteI16(NiFpga_Session session,
|
|
uint32_t control,
|
|
int16_t value);
|
|
|
|
/**
|
|
* Writes an unsigned 16-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteU16(NiFpga_Session session,
|
|
uint32_t control,
|
|
uint16_t value);
|
|
|
|
/**
|
|
* Writes a signed 32-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteI32(NiFpga_Session session,
|
|
uint32_t control,
|
|
int32_t value);
|
|
|
|
/**
|
|
* Writes an unsigned 32-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteU32(NiFpga_Session session,
|
|
uint32_t control,
|
|
uint32_t value);
|
|
|
|
/**
|
|
* Writes a signed 64-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteI64(NiFpga_Session session,
|
|
uint32_t control,
|
|
int64_t value);
|
|
|
|
/**
|
|
* Writes an unsigned 64-bit integer value to a given control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param value value to write
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteU64(NiFpga_Session session,
|
|
uint32_t control,
|
|
uint64_t value);
|
|
|
|
/**
|
|
* Reads an entire array of boolean values from a given array indicator or
|
|
* control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayBool(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
NiFpga_Bool* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of signed 8-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayI8(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int8_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of unsigned 8-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayU8(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint8_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of signed 16-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayI16(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int16_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of unsigned 16-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayU16(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint16_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of signed 32-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayI32(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int32_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of unsigned 32-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayU32(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint32_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of signed 64-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayI64(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
int64_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Reads an entire array of unsigned 64-bit integer values from a given array
|
|
* indicator or control.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* indicator or control.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param indicator indicator or control from which to read
|
|
* @param array outputs the entire array that was read
|
|
* @param size exact number of elements in the indicator or control
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadArrayU64(NiFpga_Session session,
|
|
uint32_t indicator,
|
|
uint64_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of boolean values to a given array control or
|
|
* indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayBool(NiFpga_Session session,
|
|
uint32_t control,
|
|
const NiFpga_Bool* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of signed 8-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayI8(NiFpga_Session session,
|
|
uint32_t control,
|
|
const int8_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of unsigned 8-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayU8(NiFpga_Session session,
|
|
uint32_t control,
|
|
const uint8_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of signed 16-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayI16(NiFpga_Session session,
|
|
uint32_t control,
|
|
const int16_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of unsigned 16-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayU16(NiFpga_Session session,
|
|
uint32_t control,
|
|
const uint16_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of signed 32-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayI32(NiFpga_Session session,
|
|
uint32_t control,
|
|
const int32_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of unsigned 32-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayU32(NiFpga_Session session,
|
|
uint32_t control,
|
|
const uint32_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of signed 64-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayI64(NiFpga_Session session,
|
|
uint32_t control,
|
|
const int64_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Writes an entire array of unsigned 64-bit integer values to a given array
|
|
* control or indicator.
|
|
*
|
|
* @warning The size passed must be the exact number of elements in the
|
|
* control or indicator.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param control control or indicator to which to write
|
|
* @param array entire array to write
|
|
* @param size exact number of elements in the control or indicator
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteArrayU64(NiFpga_Session session,
|
|
uint32_t control,
|
|
const uint64_t* array,
|
|
size_t size);
|
|
|
|
/**
|
|
* Enumeration of all 32 possible IRQs. Multiple IRQs can be bitwise ORed
|
|
* together like this:
|
|
*
|
|
* NiFpga_Irq_3 | NiFpga_Irq_23
|
|
*/
|
|
typedef enum
|
|
{
|
|
NiFpga_Irq_0 = 1 << 0,
|
|
NiFpga_Irq_1 = 1 << 1,
|
|
NiFpga_Irq_2 = 1 << 2,
|
|
NiFpga_Irq_3 = 1 << 3,
|
|
NiFpga_Irq_4 = 1 << 4,
|
|
NiFpga_Irq_5 = 1 << 5,
|
|
NiFpga_Irq_6 = 1 << 6,
|
|
NiFpga_Irq_7 = 1 << 7,
|
|
NiFpga_Irq_8 = 1 << 8,
|
|
NiFpga_Irq_9 = 1 << 9,
|
|
NiFpga_Irq_10 = 1 << 10,
|
|
NiFpga_Irq_11 = 1 << 11,
|
|
NiFpga_Irq_12 = 1 << 12,
|
|
NiFpga_Irq_13 = 1 << 13,
|
|
NiFpga_Irq_14 = 1 << 14,
|
|
NiFpga_Irq_15 = 1 << 15,
|
|
NiFpga_Irq_16 = 1 << 16,
|
|
NiFpga_Irq_17 = 1 << 17,
|
|
NiFpga_Irq_18 = 1 << 18,
|
|
NiFpga_Irq_19 = 1 << 19,
|
|
NiFpga_Irq_20 = 1 << 20,
|
|
NiFpga_Irq_21 = 1 << 21,
|
|
NiFpga_Irq_22 = 1 << 22,
|
|
NiFpga_Irq_23 = 1 << 23,
|
|
NiFpga_Irq_24 = 1 << 24,
|
|
NiFpga_Irq_25 = 1 << 25,
|
|
NiFpga_Irq_26 = 1 << 26,
|
|
NiFpga_Irq_27 = 1 << 27,
|
|
NiFpga_Irq_28 = 1 << 28,
|
|
NiFpga_Irq_29 = 1 << 29,
|
|
NiFpga_Irq_30 = 1 << 30,
|
|
NiFpga_Irq_31 = 1U << 31
|
|
} NiFpga_Irq;
|
|
|
|
/**
|
|
* Represents an infinite timeout.
|
|
*/
|
|
static const uint32_t NiFpga_InfiniteTimeout = 0xFFFFFFFF;
|
|
|
|
/**
|
|
* See NiFpga_ReserveIrqContext for more information.
|
|
*/
|
|
typedef void* NiFpga_IrqContext;
|
|
|
|
/**
|
|
* IRQ contexts are single-threaded; only one thread can wait with a
|
|
* particular context at any given time. To minimize jitter when first
|
|
* waiting on IRQs, reserve as many contexts as the application
|
|
* requires.
|
|
*
|
|
* If a context is successfully reserved (the returned status is not an error),
|
|
* it must be unreserved later. Otherwise a memory leak will occur.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param context outputs the IRQ context
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReserveIrqContext(NiFpga_Session session,
|
|
NiFpga_IrqContext* context);
|
|
|
|
/**
|
|
* Unreserves an IRQ context obtained from NiFpga_ReserveIrqContext.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param context IRQ context to unreserve
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_UnreserveIrqContext(NiFpga_Session session,
|
|
NiFpga_IrqContext context);
|
|
|
|
/**
|
|
* This is a blocking function that stops the calling thread until the
|
|
* FPGA asserts any IRQ in the irqs parameter, or until the function
|
|
* call times out. Before calling this function, use
|
|
* NiFpga_ReserveIrqContext to reserve an IRQ context. No other
|
|
* threads can use the same context when this function is called.
|
|
*
|
|
* You can use the irqsAsserted parameter to determine which IRQs were asserted
|
|
* for each function call.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param context IRQ context with which to wait
|
|
* @param irqs bitwise OR of NiFpga_Irqs
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param irqsAsserted if non-NULL, outputs bitwise OR of IRQs that were
|
|
* asserted
|
|
* @param timedOut if non-NULL, outputs whether the timeout expired
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WaitOnIrqs(NiFpga_Session session,
|
|
NiFpga_IrqContext context,
|
|
uint32_t irqs,
|
|
uint32_t timeout,
|
|
uint32_t* irqsAsserted,
|
|
NiFpga_Bool* timedOut);
|
|
|
|
/**
|
|
* Acknowledges an IRQ or set of IRQs.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param irqs bitwise OR of NiFpga_Irqs
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcknowledgeIrqs(NiFpga_Session session,
|
|
uint32_t irqs);
|
|
|
|
/**
|
|
* Specifies the depth of the host memory part of the DMA FIFO. This method is
|
|
* optional. In order to see the actual depth configured, use
|
|
* NiFpga_ConfigureFifo2.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo FIFO to configure
|
|
* @param depth requested number of elements in the host memory part of the
|
|
* DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ConfigureFifo(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
size_t depth);
|
|
|
|
/**
|
|
* Specifies the depth of the host memory part of the DMA FIFO. This method is
|
|
* optional.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo FIFO to configure
|
|
* @param requestedDepth requested number of elements in the host memory part
|
|
* of the DMA FIFO
|
|
* @param actualDepth if non-NULL, outputs the actual number of elements in the
|
|
* host memory part of the DMA FIFO, which may be more than
|
|
* the requested number
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ConfigureFifo2(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
size_t requestedDepth,
|
|
size_t* actualDepth);
|
|
|
|
/**
|
|
* Starts a FIFO. This method is optional.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo FIFO to start
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_StartFifo(NiFpga_Session session,
|
|
uint32_t fifo);
|
|
|
|
/**
|
|
* Stops a FIFO. This method is optional.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo FIFO to stop
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_StopFifo(NiFpga_Session session,
|
|
uint32_t fifo);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of booleans.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoBool(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
NiFpga_Bool* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of signed 8-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoI8(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int8_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of unsigned 8-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoU8(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint8_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of signed 16-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoI16(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int16_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of unsigned 16-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoU16(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint16_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of signed 32-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoI32(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int32_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of unsigned 32-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoU32(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint32_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of signed 64-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoI64(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int64_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Reads from a target-to-host FIFO of unsigned 64-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param data outputs the data that was read
|
|
* @param numberOfElements number of elements to read
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReadFifoU64(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint64_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of booleans.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoBool(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const NiFpga_Bool* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of signed 8-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoI8(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const int8_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of unsigned 8-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoU8(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const uint8_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of signed 16-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoI16(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const int16_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of unsigned 16-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoU16(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const uint16_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of signed 32-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoI32(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const int32_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of unsigned 32-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoU32(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const uint32_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of signed 64-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoI64(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const int64_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Writes to a host-to-target FIFO of unsigned 64-bit integers.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param data data to write
|
|
* @param numberOfElements number of elements to write
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
|
* elements remaining in the host memory part of
|
|
* the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_WriteFifoU64(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
const uint64_t* data,
|
|
size_t numberOfElements,
|
|
uint32_t timeout,
|
|
size_t* emptyElementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of booleans.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsBool(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
NiFpga_Bool** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of signed 8-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsI8(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int8_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of unsigned 8-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsU8(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint8_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of signed 16-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsI16(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int16_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of unsigned 16-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsU16(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint16_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of signed 32-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsI32(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int32_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of unsigned 32-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsU32(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint32_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of signed 64-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsI64(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int64_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for reading from a target-to-host FIFO of unsigned 64-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
|
* the contents of elements from the host memory buffer to a separate
|
|
* user-allocated buffer before reading. The FPGA target cannot write to
|
|
* elements acquired by the host. Therefore, the host must release elements
|
|
* after reading them. The number of elements acquired may differ from the
|
|
* number of elements requested if, for example, the number of elements
|
|
* requested reaches the end of the host memory buffer. Always release all
|
|
* acquired elements before closing the session. Do not attempt to access FIFO
|
|
* elements after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo target-to-host FIFO from which to read
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoReadElementsU64(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint64_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of booleans.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsBool(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
NiFpga_Bool** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of signed 8-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsI8(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int8_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of unsigned 8-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsU8(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint8_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of signed 16-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsI16(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int16_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of unsigned 16-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsU16(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint16_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of signed 32-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsI32(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int32_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of unsigned 32-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsU32(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint32_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of signed 64-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsI64(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
int64_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Acquires elements for writing to a host-to-target FIFO of unsigned 64-bit
|
|
* integers.
|
|
*
|
|
* Acquiring, writing, and releasing FIFO elements prevents the need to write
|
|
* first into a separate user-allocated buffer and then copy the contents of
|
|
* elements to the host memory buffer. The FPGA target cannot read elements
|
|
* acquired by the host. Therefore, the host must release elements after
|
|
* writing to them. The number of elements acquired may differ from the number
|
|
* of elements requested if, for example, the number of elements requested
|
|
* reaches the end of the host memory buffer. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo host-to-target FIFO to which to write
|
|
* @param elements outputs a pointer to the elements acquired
|
|
* @param elementsRequested requested number of elements
|
|
* @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
|
* @param elementsAcquired actual number of elements acquired, which may be
|
|
* less than the requested number
|
|
* @param elementsRemaining if non-NULL, outputs the number of elements
|
|
* remaining in the host memory part of the DMA FIFO
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_AcquireFifoWriteElementsU64(
|
|
NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint64_t** elements,
|
|
size_t elementsRequested,
|
|
uint32_t timeout,
|
|
size_t* elementsAcquired,
|
|
size_t* elementsRemaining);
|
|
|
|
/**
|
|
* Releases previously acquired FIFO elements.
|
|
*
|
|
* The FPGA target cannot read elements acquired by the host. Therefore, the
|
|
* host must release elements after acquiring them. Always release all acquired
|
|
* elements before closing the session. Do not attempt to access FIFO elements
|
|
* after the elements are released or the session is closed.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo FIFO from which to release elements
|
|
* @param elements number of elements to release
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
size_t elements);
|
|
|
|
/**
|
|
* Gets an endpoint reference to a peer-to-peer FIFO.
|
|
*
|
|
* @param session handle to a currently open session
|
|
* @param fifo peer-to-peer FIFO
|
|
* @param endpoint outputs the endpoint reference
|
|
* @return result of the call
|
|
*/
|
|
NiFpga_Status NiFpga_GetPeerToPeerFifoEndpoint(NiFpga_Session session,
|
|
uint32_t fifo,
|
|
uint32_t* endpoint);
|
|
|
|
#if NiFpga_Cpp
|
|
}
|
|
#endif
|
|
|
|
#endif
|